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130 v maximum offset voltage o p am p in tsot AD8677 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2005-2011 analog devices, inc. all rights reserved. features low offset voltage: 130 v max input offset drift: 1.5 v/c max low noise: 0.25 v p-p high gain, cmrr and psrr: 115 db min low supply current: 1.1 ma wide supply voltage range: 4 v to 18 v operation applications medical and industrial instrumentation sensors and controls thermocouple rtds strain bridges shunt current measurements precision filters general description the AD8677 is the next generation of precision, ultralow offset amplifiers. it builds on the high performance of the op07 and integrates lower power (1.1 ma typical), lower input bias current (1 na maximum), and higher cmrr/psrr (130 db) in the small tsot package. operation is fully specified from 5 v to 15 v supply. the AD8677 provides higher accuracy than industry-standard op07-type amplifiers due to analog devices ipolar? process, which supports enhanced performance in a smaller footprint. these performance enhancements include wider output swing, lower power, and higher cmrr (common-mode rejection ratio) and psrr (power supply rejection ratio). the AD8677 maintains stability of offsets and gain virtually regardless of variations in time or temperature. excellent linearity and gain accuracy can be maintained at high closed-loop gains. the AD8677 is fully specified over the extended industrial tem- perature range of ?40c to +125c. the AD8677 amplifier is available in the tiny, 5-lead tsot and the popular 8-lead, narrow soic lead-free packages. pin configurations 05578-001 AD8677 top view (not to scale) 1 2 3 out v? +in 5 4 v+ ?in figure 1. 5-lead tsot (uj-5) 05578-002 nc = no connect AD8677 top view (not to scale) 1 2 3 4 null ?in +in v? 8 7 6 5 null v+ out nc figure 2. 8-lead soic_n (r-8)
AD8677 rev. a | page 2 of 16 table of contents features .............................................................................................. 1 ? applications....................................................................................... 1 ? general description ......................................................................... 1 ? pin configurations ........................................................................... 1 ? revision history ............................................................................... 2 ? specifications..................................................................................... 3 ? absolute maximum ratings ............................................................5 ? thermal resistance .......................................................................5 ? esd caution...................................................................................5 ? typical performance characteristics ..............................................6 ? outline dimensions ....................................................................... 13 ? ordering guide .......................................................................... 13 ? revision history 6/11rev. 0 to rev. a change to figure 43 ....................................................................... 12 updated outline dimensions ....................................................... 13 11/05revision 0: initial version
AD8677 rev. a | page 3 of 16 specifications v s = 5.0 v, t a = +25c, unless otherwise specified. table 1. parameter symbol test conditions/comments min typ max unit input characteristics offset voltage v os 40 130 v ?40c ta +125c 350 v input bias current i b 0.2 1 na ?40c ta +125c 1 na input offset current i os 0.1 1 na ?40c ta +125c 1 na input voltage range ?3.5 +3.5 v common-mode rejection ratio cmrr v cm = 3 v 120 127 db ?40c ta +125c 120 db open-loop gain a vo r l = 2 k to ground, v o = 3 v 1000 10000 v/mv ?40c ta +125c 1000 v/mv v os / t ?40c ta +125c 0.5 1.4 v/c output characteristics output voltage swing v out r l = 10 k to ground 3.95 4.1 v ?40c ta +125c 3.95 v r l = 2 k to ground 3.9 4 v ?40c ta +125c 3.9 v short-circuit limit i sc 27 ma output current i o v o = 3.5 v 15 ma power supply power supply rejection ratio psrr v s = 4.0 v to 18.0 v 115 130 db ?40c ta +125c 110 db supply current/amplifier i sy v o = 0 v 1.1 1.25 ma ?40c ta +125c 1.7 ma dynamic performance slew rate sr r l = 10 k 0.2 v/s gain bandwidth product gbp 0.6 mhz phase margin 80 degrees noise performance voltage noise e n p-p 0.1 hz to 10 hz 0.28 v p-p voltage noise density e n f = 1 khz 10 nv/ hz current noise density i n f = 1 khz 0.074 pa/ hz
AD8677 rev. a | page 4 of 16 v s = 15 v, t a = +25c, unless otherwise specified. table 2. parameter symbol test conditions/comments min typ max unit input characteristics offset voltage v os 45 130 v ?40c ta +125c 350 v input bias current i b 0.2 1 na ?40c ta +125c 1 na input offset current i os 0.2 1 na ?40c ta +125c 1 na input voltage range ?13.5 +13.5 v common-mode rejection ratio cmrr v cm = 13.0 v 120 140 db ?40c ta +125c 120 db open loop gain a vo r l = 2 k to ground, v o = 11 v 1000 10000 v/mv ?40c ta +125c 1000 v/mv offset voltage drift v os / t ?40c ta +125c 0.5 1.5 v/c output characteristics output voltage swing v out r l = 10 k to ground 13.95 14 v ?40c ta +125c 13.9 v r l = 2 k to ground 13.75 13.8 v ?40c ta +125c 13.7 v short circuit limit i sc 30 ma output current i o v o = 13.5 v 15 ma power supply power supply rejection ratio psrr v s = 4.0 v to 18.0 v 115 130 db ?40c ta +125c 110 db supply current/amplifier i sy v o = 0 v 1.1 1.3 ma ?40c ta +125c 1.8 ma dynamic performance slew rate sr r l = 10 k 0.2 v/s gain bandwidth product gbp 0.6 mhz phase margin 80 degrees noise performance voltage noise e n p-p 0.1 hz to 10 hz 0.25 v p-p voltage noise density e n f = 1 khz 10 nv/ hz current noise density i n f = 1 khz 0.074 pa/ hz
AD8677 rev. a | page 5 of 16 absolute maximum ratings table 3. parameter value supply voltage 18 v input voltage v supply differential input voltage 0.7 v output short-circuit duration to gnd indefinite storage temperature range uj-5, r package ?65c to +150c operating temperature range ?40c to +125c junction temperature range rm, r package ?65c to +150c lead temperature (soldering, 10 sec) +300c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 4. package type ja jc unit 5-lead tsot (uj-5) 207 61 c/w 8-lead soic (r-8) 158 43 c/w esd caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge wi thout detection. although this product features proprietary esd protection circuitry, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. therefor e, proper esd precautions are re commended to avoid performance degradation or loss of functionality.
AD8677 rev. a | page 6 of 16 typical performance characteristics 50 0 5 10 15 20 25 30 35 40 45 ?100 ?80 ?60 ?40 ?20 0 20 40 60 80 100 05578-003 number of amplifiers v os (v) v s = 15v figure 3. input offset voltage distribution 40 0 5 10 15 20 25 30 35 ?100 ?80 ?60 ?40 ?20 0 20 40 60 80 100 05578-004 number of amplifiers v os (v) v s = 5v figure 4. input offset voltage distribution 50 40 30 20 10 0 01 0.90 0.75 0.60 0.45 0.30 0.15 05578-047 number of amplifiers tcv os (v/c) . 0 5 v s = 5v figure 5. tcv os vs. number of amplifiers 45 40 35 30 25 20 15 10 5 0 01 1.05 0.90 0.75 0.60 0.45 0.30 0.15 05578-048 number of amplifiers tcv os (v/c) . 2 0 v s = 15v figure 6. tcv os vs. number of amplifiers 200 ?200 ?150 ?100 ?50 0 50 100 150 ?50 0 50 100 150 05578-005 v os (v) temperature (c) v s = 15v figure 7. offset voltage vs. temperature 200 ?200 ?150 ?100 ?50 0 50 100 150 ?50 0 50 100 150 05578-006 v os (v) temperature (c) v s = 5v figure 8. offset voltage vs. temperature
AD8677 rev. a | page 7 of 16 1.6 0.4 0.6 0.8 1.0 1.2 1.4 ?50 0 50 100 150 05578-007 i sy (ma) temperature (c) v s = 5v v s = 15v figure 9. supply current vs. temperature 14.40 14.35 14.30 14.25 14.20 14.15 14.10 ?50 0 50 100 150 05578-009 v oh (v) temperature (c) v s = 15v r l = 10k ? figure 10. +v out vs. temperature 4.45 4.40 4.35 4.30 4.25 4.20 4.15 ?50 0 50 100 150 05578-010 v oh (v) temperature (c) v s = 5v r l = 10k ? figure 11. +v out vs. temperature ? 13.92 ?14.10 ?14.08 ?14.06 ?14.04 ?14.02 ?14.00 ?13.98 ?13.96 ?13.94 ?50 0 50 100 150 05578-011 v ol (v) temperature (c) v s = 15v r l = 10k ? figure 12. ?v out vs. temperature ? 3.98 ?4.16 ?4.14 ?4.12 ?4.10 ?4.08 ?4.06 ?4.04 ?4.02 ?4.00 ?50 0 50 100 150 05578-012 v ol (v) temperature (c) v s = 5v r l = 10k ? figure 13. ?v out vs. temperature 0 ?0.5 ?0.4 ?0.3 ?0.2 ?0.1 ?50 0 50 100 150 05578-013 i b (na) temperature (c) v s = 15v figure 14. input bias current vs. temperature
AD8677 rev. a | page 8 of 16 0 ?0.40 ?0.35 ?0.30 ?0.25 ?0.20 ?0.15 ?0.10 ?0.05 ?50 0 50 100 150 05578-014 i b (na) temperature (c) v s =5v figure 15. input bias current vs. temperature v s = 15v v s = 5v 146 124 126 128 130 132 134 134 138 140 142 144 ?50 0 50 100 150 05578-015 cmrr (db) temperature (c) figure 16. cmrr vs. temperature 16000 2000 4000 6000 8000 10000 12000 14000 ?50 0 50 100 150 05578-017 a vo (v/mv) temperature (c) v s = 15v v s = 5v r l = 2k ? figure 17. open-loop ga in vs. temperature 150 120 130 140 ?50 0 50 100 150 05578-019 psrr (db) temperature (c) v s = 4v to 18v figure 18. psrr vs. temperature 40 10 20 30 ?50 0 50 100 150 v s = 5v v s = 15v 05578-020 i sc (ma) temperature (c) figure 19. short circuit current vs. temperature 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 1 02 03 04 05578-022 supply current (ma) supply voltage (v) 0 figure 20. supply current vs. total supply voltages
AD8677 rev. a | page 9 of 16 10 1 0.1 0.01 0.1 1 10 100 05578-023 v sy ? v out (v) i load (ma) v oh = +v out v ol = ?v out v s = 15v figure 21. output voltage swing vs. load current 10 1 0.1 0.01 0.1 1 10 100 05578-024 i load (ma) v s = 5v v sy ? v out (v) v oh = +v out v ol = ?v out figure 22. output voltage swing vs. load current 100 ?40 ?20 0 20 40 60 80 100 0 20 40 60 80 100 1k 10k 100k 1m 10m 05578-025 gain phase margin (degrees) frequency (hz) gain phase v s = 15v r l = c l = 20pf m = 80 degrees figure 23. open-loop gain and phase vs. frequency 50 ?10 0 10 20 30 40 100 1k 10k 100k 1m 05578-026 closed-loop gain (db) frequency (hz) v s =15v v in = 28mv r l = c l = 20pf g=+1 g=+10 g=+100 figure 24. closed-loop gain vs. frequency 50 ?10 0 10 20 30 40 100 1k 10k 100k 1m 05578-027 closed-loop gain (db) frequency (hz) v s =5v v in = 28mv r l = c l = 20pf g=+1 g=+10 g=+100 figure 25. closed-loop gain vs. frequency 30 0 5 10 15 20 25 01 10 8 ?os +os 6 4 2 05578-028 overshoot (%) c load (nf) 2 v s = 15v v in = 50mv g = +1 figure 26. overshoot vs. capacitive load
AD8677 rev. a | page 10 of 16 30 0 5 10 15 20 25 0246810 ?os +os 05578-029 overshoot (%) c load (nf) 12 v s = 5v v in = 50mv g = +1 figure 27. overshoot vs. capacitive load 112 110 108 106 104 102 100 98 96 100 1m 10k 100k 1k 05578-030 cmrr (db) frequency (hz) v s = 15v figure 28. cmrr vs. frequency 100 80 60 40 20 0 10 1m 10k 100k 1k 100 05578-031 psrr (db) frequency (hz) ?psrr +psrr figure 29. psrr vs. frequency 100 10 1 0.1 0.01 10 1m 10k 100k 1k 100 05578-032 r out ( ? ) frequency (hz) g = +100 g = +10 g = +1 v s = 15v v in = 28mv r l = c l = 20pf figure 30. output im pedance vs. frequency 100 10 1 0.1 0.01 10 1m 10k 100k 1k 100 05578-033 r out ( ? ) frequency (hz) g = +100 g = +10 g = +1 v s = 5v v in = 28mv r l = c l = 20pf figure 31. output im pedance vs. frequency 100 10 1 0.1 1k 100 10 1 05578-034 voltage noise density (nv/ hz) frequency (hz) v s = 15v figure 32. voltage noise density vs. frequency
AD8677 rev. a | page 11 of 16 10 1 0.1 0.01 0.1 1k 100 10 1 05578-035 i n (pa/ hz) frequency (hz) v s = 15v figure 33. current noise density vs. frequency 05578-036 2 v s = 5v and 15v c l = 1nf g = +1 v in = 100mv p-p output voltage (100mv/div) time (100s/div) figure 34. small signal transient 05578-038 2 output voltage (1v/div) v s = 15v c l = 1nf g = +1 v in = 4v p-p time (100s/div) figure 35. large signal transient 05578-039 2 v s = 5v c l = 1nf g = +1 v in = 4v p-p output voltage (1v/div) time (100s/div) figure 36. large signal transient 05578-040 0v ?5v ?10v ?15v ?20v 0v ?200mv 200mv 400m v v s = 15v v in = 200mv g = ?100 recovery = 1s v in v out time (10s/div) figure 37. positive overload recovery 05578-041 0v ?5v 5v 10v 15v 0v ?200mv 200mv 400m v v s = 15v v in = 200mv g = ?100 recovery = 5s v in v out time (10s/div) figure 38. negative overload recovery
AD8677 rev. a | page 12 of 16 05578-045 1 v s = 15v vn p-p = 0.24v voltage noise (0.2v/div) time (1s/div) figure 42. voltage noise (0.1 hz to 10 hz) 05578-049 1 2 3 8 4 7 6 ? + AD8677 v+ output v os trim range is typically 3.5mv 20k ? inpu t ? + v? figure 43. optional o ffset nulling circuit 05578-042 0v ?2v ?4v ?6v ?8v 0v ?600mv 600mv 1200m v v s = 5v v in = 600mv g = ?10 recovery = 2.4s v in v out time (4s/div) figure 39. positive overload recovery 05578-043 0v 2v ?2v ?4v 4v 0v ?600mv 600mv 1200m v v s = 5v v in = 600mv g = ?10 recovery = 5.6s v out v in time (4s/div) figure 40. negative overload recovery 05578-044 2 v s = 5v v in = 5.7v v in v out time (400s/div) figure 41. no phase reversal
AD8677 rev. a | page 13 of 16 outline dimensions 100708-a * compliant to jedec standards mo-193-ab with the exception of package height and thickness. 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 0.20 0.08 0.60 0.45 0.30 8 4 0 0.50 0.30 0.10 max * 1.00 max * 0.90 max 0.70 min 2.90 bsc 54 12 3 seating plane figure 44. 5-lead thin small outline transistor package [tsot] (uj-5) dimensions shown in millimeters controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 45. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) ordering guide model 1 temperature range package description package option branding AD8677arz ?40c to +125c 8-lead standard small outline package [soic_n] r-8 AD8677arz-reel ?40c to +125c 8-lead standa rd small outline package [soic_n] r-8 AD8677arz-reel7 ?40c to +125c 8-lead stan dard small outline package [soic_n] r-8 AD8677aujz-r2 ?40c to +125c 5-lead thin small outline transistor package [tsot] uj-5 a0e AD8677aujz-reel ?40c to +125c 5-lead thin small outline transistor package [tsot] uj-5 a0e AD8677aujz-reel7 ?40c to +125c 5-lead thin sma ll outline transistor package [tsot] uj-5 a0e 1 z = rohs compliant part.
AD8677 rev. a | page 14 of 16 notes
AD8677 rev. a | page 15 of 16 notes
AD8677 rev. a | page 16 of 16 notes ? 2005-2011 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d05578-0-6/11(a)

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